mirror of
https://github.com/muun/recovery.git
synced 2025-11-13 23:31:38 -05:00
Release 2.2.3
This commit is contained in:
1
vendor/golang.org/x/sys/cpu/asm_aix_ppc64.s
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vendor/golang.org/x/sys/cpu/asm_aix_ppc64.s
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@@ -2,6 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build gc
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// +build gc
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#include "textflag.h"
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1
vendor/golang.org/x/sys/cpu/byteorder.go
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vendor/golang.org/x/sys/cpu/byteorder.go
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@@ -46,6 +46,7 @@ func hostByteOrder() byteOrder {
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case "386", "amd64", "amd64p32",
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"alpha",
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"arm", "arm64",
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"loong64",
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"mipsle", "mips64le", "mips64p32le",
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"nios2",
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"ppc64le",
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10
vendor/golang.org/x/sys/cpu/cpu.go
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vendor/golang.org/x/sys/cpu/cpu.go
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@@ -56,6 +56,7 @@ var X86 struct {
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HasAVX512BF16 bool // Advanced vector extension 512 BFloat16 Instructions
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HasBMI1 bool // Bit manipulation instruction set 1
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HasBMI2 bool // Bit manipulation instruction set 2
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HasCX16 bool // Compare and exchange 16 Bytes
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HasERMS bool // Enhanced REP for MOVSB and STOSB
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HasFMA bool // Fused-multiply-add instructions
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HasOSXSAVE bool // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
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@@ -105,8 +106,8 @@ var ARM64 struct {
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// ARM contains the supported CPU features of the current ARM (32-bit) platform.
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// All feature flags are false if:
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// 1. the current platform is not arm, or
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// 2. the current operating system is not Linux.
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// 1. the current platform is not arm, or
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// 2. the current operating system is not Linux.
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var ARM struct {
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_ CacheLinePad
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HasSWP bool // SWP instruction support
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@@ -154,14 +155,13 @@ var MIPS64X struct {
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// For ppc64/ppc64le, it is safe to check only for ISA level starting on ISA v3.00,
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// since there are no optional categories. There are some exceptions that also
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// require kernel support to work (DARN, SCV), so there are feature bits for
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// those as well. The minimum processor requirement is POWER8 (ISA 2.07).
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// The struct is padded to avoid false sharing.
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// those as well. The struct is padded to avoid false sharing.
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var PPC64 struct {
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_ CacheLinePad
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HasDARN bool // Hardware random number generator (requires kernel enablement)
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HasSCV bool // Syscall vectored (requires kernel enablement)
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IsPOWER8 bool // ISA v2.07 (POWER8)
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IsPOWER9 bool // ISA v3.00 (POWER9)
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IsPOWER9 bool // ISA v3.00 (POWER9), implies IsPOWER8
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_ CacheLinePad
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}
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1
vendor/golang.org/x/sys/cpu/cpu_aix.go
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vendor/golang.org/x/sys/cpu/cpu_aix.go
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@@ -20,6 +20,7 @@ func archInit() {
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PPC64.IsPOWER8 = true
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}
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if impl&_IMPL_POWER9 != 0 {
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PPC64.IsPOWER8 = true
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PPC64.IsPOWER9 = true
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}
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1
vendor/golang.org/x/sys/cpu/cpu_arm64.s
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vendor/golang.org/x/sys/cpu/cpu_arm64.s
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@@ -2,6 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build gc
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// +build gc
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#include "textflag.h"
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6
vendor/golang.org/x/sys/cpu/cpu_gccgo_x86.go
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vendor/golang.org/x/sys/cpu/cpu_gccgo_x86.go
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@@ -25,3 +25,9 @@ func xgetbv() (eax, edx uint32) {
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gccgoXgetbv(&a, &d)
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return a, d
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}
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// gccgo doesn't build on Darwin, per:
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// https://github.com/Homebrew/homebrew-core/blob/HEAD/Formula/gcc.rb#L76
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func darwinSupportsAVX512() bool {
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return false
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}
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13
vendor/golang.org/x/sys/cpu/cpu_loong64.go
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Normal file
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vendor/golang.org/x/sys/cpu/cpu_loong64.go
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@@ -0,0 +1,13 @@
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// Copyright 2022 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build loong64
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// +build loong64
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package cpu
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const cacheLineSize = 64
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func initOptions() {
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}
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1
vendor/golang.org/x/sys/cpu/cpu_s390x.s
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vendor/golang.org/x/sys/cpu/cpu_s390x.s
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@@ -2,6 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build gc
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// +build gc
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#include "textflag.h"
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vendor/golang.org/x/sys/cpu/cpu_x86.go
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vendor/golang.org/x/sys/cpu/cpu_x86.go
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@@ -39,6 +39,7 @@ func initOptions() {
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{Name: "avx512bf16", Feature: &X86.HasAVX512BF16},
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{Name: "bmi1", Feature: &X86.HasBMI1},
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{Name: "bmi2", Feature: &X86.HasBMI2},
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{Name: "cx16", Feature: &X86.HasCX16},
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{Name: "erms", Feature: &X86.HasERMS},
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{Name: "fma", Feature: &X86.HasFMA},
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{Name: "osxsave", Feature: &X86.HasOSXSAVE},
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@@ -73,6 +74,7 @@ func archInit() {
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X86.HasPCLMULQDQ = isSet(1, ecx1)
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X86.HasSSSE3 = isSet(9, ecx1)
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X86.HasFMA = isSet(12, ecx1)
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X86.HasCX16 = isSet(13, ecx1)
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X86.HasSSE41 = isSet(19, ecx1)
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X86.HasSSE42 = isSet(20, ecx1)
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X86.HasPOPCNT = isSet(23, ecx1)
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@@ -87,8 +89,15 @@ func archInit() {
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(1, eax) && isSet(2, eax)
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// Check if OPMASK and ZMM registers have OS support.
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osSupportsAVX512 = osSupportsAVX && isSet(5, eax) && isSet(6, eax) && isSet(7, eax)
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if runtime.GOOS == "darwin" {
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// Darwin doesn't save/restore AVX-512 mask registers correctly across signal handlers.
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// Since users can't rely on mask register contents, let's not advertise AVX-512 support.
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// See issue 49233.
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osSupportsAVX512 = false
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} else {
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// Check if OPMASK and ZMM registers have OS support.
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osSupportsAVX512 = osSupportsAVX && isSet(5, eax) && isSet(6, eax) && isSet(7, eax)
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}
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}
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X86.HasAVX = isSet(28, ecx1) && osSupportsAVX
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1
vendor/golang.org/x/sys/cpu/cpu_x86.s
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1
vendor/golang.org/x/sys/cpu/cpu_x86.s
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@@ -2,6 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build (386 || amd64 || amd64p32) && gc
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// +build 386 amd64 amd64p32
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// +build gc
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2
vendor/golang.org/x/sys/cpu/syscall_aix_gccgo.go
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2
vendor/golang.org/x/sys/cpu/syscall_aix_gccgo.go
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@@ -5,7 +5,7 @@
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// Recreate a getsystemcfg syscall handler instead of
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// using the one provided by x/sys/unix to avoid having
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// the dependency between them. (See golang.org/issue/32102)
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// Morever, this file will be used during the building of
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// Moreover, this file will be used during the building of
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// gccgo's libgo and thus must not used a CGo method.
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//go:build aix && gccgo
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