mirror of https://github.com/minio/minio.git
376 lines
9.8 KiB
NASM
376 lines
9.8 KiB
NASM
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; * Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; * Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in
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; the documentation and/or other materials provided with the
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; distribution.
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; * Neither the name of Intel Corporation nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; gf_4vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
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;;;
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%ifidn __OUTPUT_FORMAT__, macho64
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%define GF_4VECT_MAD_SSE _gf_4vect_mad_sse
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%else
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%define GF_4VECT_MAD_SSE gf_4vect_mad_sse
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%endif
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%define PS 8
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%ifidn __OUTPUT_FORMAT__, win64
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%define arg0 rcx
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%define arg0.w ecx
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%define arg1 rdx
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%define arg2 r8
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%define arg3 r9
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%define arg4 r12
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%define arg5 r15
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r13
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%define return rax
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%define return.w eax
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%define stack_size 16*10 + 3*8
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%define arg(x) [rsp + stack_size + PS + PS*x]
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%define func(x) proc_frame x
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%macro FUNC_SAVE 0
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sub rsp, stack_size
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movdqa [rsp+16*0],xmm6
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movdqa [rsp+16*1],xmm7
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movdqa [rsp+16*2],xmm8
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movdqa [rsp+16*3],xmm9
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movdqa [rsp+16*4],xmm10
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movdqa [rsp+16*5],xmm11
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movdqa [rsp+16*6],xmm12
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movdqa [rsp+16*7],xmm13
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movdqa [rsp+16*8],xmm14
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movdqa [rsp+16*9],xmm15
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save_reg r12, 10*16 + 0*8
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save_reg r13, 10*16 + 1*8
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save_reg r15, 10*16 + 2*8
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end_prolog
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mov arg4, arg(4)
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mov arg5, arg(5)
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%endmacro
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%macro FUNC_RESTORE 0
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movdqa xmm6, [rsp+16*0]
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movdqa xmm7, [rsp+16*1]
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movdqa xmm8, [rsp+16*2]
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movdqa xmm9, [rsp+16*3]
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movdqa xmm10, [rsp+16*4]
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movdqa xmm11, [rsp+16*5]
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movdqa xmm12, [rsp+16*6]
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movdqa xmm13, [rsp+16*7]
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movdqa xmm14, [rsp+16*8]
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movdqa xmm15, [rsp+16*9]
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mov r12, [rsp + 10*16 + 0*8]
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mov r13, [rsp + 10*16 + 1*8]
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mov r15, [rsp + 10*16 + 2*8]
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add rsp, stack_size
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%endmacro
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%elifidn __OUTPUT_FORMAT__, elf64
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%define arg0 rdi
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%define arg0.w edi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r12
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%define return rax
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%define return.w eax
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%define func(x) x:
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%macro FUNC_SAVE 0
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push r12
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%endmacro
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%macro FUNC_RESTORE 0
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pop r12
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%endmacro
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%elifidn __OUTPUT_FORMAT__, macho64
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%define arg0 rdi
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%define arg0.w edi
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%define arg1 rsi
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%define arg2 rdx
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%define arg3 rcx
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%define arg4 r8
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%define arg5 r9
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%define tmp r11
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%define tmp2 r10
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%define tmp3 r12
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%define return rax
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%define return.w eax
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%define func(x) x:
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%macro FUNC_SAVE 0
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push r12
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%endmacro
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%macro FUNC_RESTORE 0
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pop r12
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%endmacro
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%endif
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;;; gf_4vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
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%define len arg0
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%define len.w arg0.w
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%define vec arg1
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%define vec_i arg2
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%define mul_array arg3
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%define src arg4
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%define dest1 arg5
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%define pos return
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%define pos.w return.w
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%define dest2 mul_array
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%define dest3 tmp2
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%define dest4 vec_i
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%ifndef EC_ALIGNED_ADDR
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;;; Use Un-aligned load/store
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%define XLDR movdqu
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%define XSTR movdqu
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%else
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;;; Use Non-temporal load/stor
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%ifdef NO_NT_LDST
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%define XLDR movdqa
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%define XSTR movdqa
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%else
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%define XLDR movntdqa
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%define XSTR movntdq
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%endif
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%endif
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default rel
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[bits 64]
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section .text
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%define xmask0f xmm15
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%define xgft3_hi xmm14
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%define xgft4_hi xmm13
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%define xgft4_lo xmm12
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%define x0 xmm0
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%define xtmpa xmm1
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%define xtmph1 xmm2
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%define xtmpl1 xmm3
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%define xtmph2 xmm4
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%define xtmpl2 xmm5
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%define xtmph3 xmm6
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%define xtmpl3 xmm7
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%define xtmph4 xmm8
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%define xtmpl4 xmm9
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%define xd1 xmm10
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%define xd2 xmm11
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%define xd3 xtmph1
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%define xd4 xtmpl1
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align 16
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global GF_4VECT_MAD_SSE:function
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func(GF_4VECT_MAD_SSE)
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FUNC_SAVE
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sub len, 16
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jl .return_fail
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xor pos, pos
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movdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
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mov tmp, vec
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sal vec_i, 5 ;Multiply by 32
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lea tmp3, [mul_array + vec_i]
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sal tmp, 6 ;Multiply by 64
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movdqu xgft3_hi, [tmp3+tmp+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
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sal vec, 5 ;Multiply by 32
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add tmp, vec
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movdqu xgft4_lo, [tmp3+tmp] ;Load array Dx{00}, Dx{01}, Dx{02}, ...
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movdqu xgft4_hi, [tmp3+tmp+16] ; " Dx{00}, Dx{10}, Dx{20}, ... , Dx{f0}
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mov dest2, [dest1+PS] ; reuse mul_array
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mov dest3, [dest1+2*PS]
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mov dest4, [dest1+3*PS] ; reuse vec_i
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mov dest1, [dest1]
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.loop16:
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XLDR x0, [src+pos] ;Get next source vector
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movdqu xtmph1, [tmp3+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
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movdqu xtmpl1, [tmp3] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
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movdqu xtmph2, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
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movdqu xtmpl2, [tmp3+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
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movdqu xtmpl3, [tmp3+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
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movdqa xtmph3, xgft3_hi
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movdqa xtmpl4, xgft4_lo
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movdqa xtmph4, xgft4_hi
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XLDR xd1, [dest1+pos] ;Get next dest vector
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XLDR xd2, [dest2+pos] ;Get next dest vector
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movdqa xtmpa, x0 ;Keep unshifted copy of src
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psraw x0, 4 ;Shift to put high nibble into bits 4-0
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pand x0, xmask0f ;Mask high src nibble in bits 4-0
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pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
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; dest1
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pshufb xtmph1, x0 ;Lookup mul table of high nibble
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pshufb xtmpl1, xtmpa ;Lookup mul table of low nibble
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pxor xtmph1, xtmpl1 ;GF add high and low partials
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pxor xd1, xtmph1
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XLDR xd3, [dest3+pos] ;Reuse xtmph1, Get next dest vector
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XLDR xd4, [dest4+pos] ;Reuse xtmpl1, Get next dest vector
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; dest2
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pshufb xtmph2, x0 ;Lookup mul table of high nibble
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pshufb xtmpl2, xtmpa ;Lookup mul table of low nibble
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pxor xtmph2, xtmpl2 ;GF add high and low partials
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pxor xd2, xtmph2
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; dest3
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pshufb xtmph3, x0 ;Lookup mul table of high nibble
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pshufb xtmpl3, xtmpa ;Lookup mul table of low nibble
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pxor xtmph3, xtmpl3 ;GF add high and low partials
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pxor xd3, xtmph3
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; dest4
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pshufb xtmph4, x0 ;Lookup mul table of high nibble
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pshufb xtmpl4, xtmpa ;Lookup mul table of low nibble
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pxor xtmph4, xtmpl4 ;GF add high and low partials
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pxor xd4, xtmph4
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XSTR [dest1+pos], xd1 ;Store result
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XSTR [dest2+pos], xd2 ;Store result
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XSTR [dest3+pos], xd3 ;Store result
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XSTR [dest4+pos], xd4 ;Store result
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add pos, 16 ;Loop on 16 bytes at a time
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cmp pos, len
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jle .loop16
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lea tmp, [len + 16]
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cmp pos, tmp
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je .return_pass
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.lessthan16:
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;; Tail len
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;; Do one more overlap pass
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mov tmp, len ;Overlapped offset length-16
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XLDR x0, [src+tmp] ;Get next source vector
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movdqu xtmph1, [tmp3+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
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movdqu xtmpl1, [tmp3] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
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movdqu xtmph2, [tmp3+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
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movdqu xtmpl2, [tmp3+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
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movdqu xtmpl3, [tmp3+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
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XLDR xd1, [dest1+tmp] ;Get next dest vector
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XLDR xd2, [dest2+tmp] ;Get next dest vector
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XLDR xtmph4, [dest3+tmp] ;Reuse xtmph1. Get next dest vector
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sub len, pos
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movdqa xtmpl4, [constip16] ;Load const of i + 16
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pinsrb xtmph3, len.w, 15
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pshufb xtmph3, xmask0f ;Broadcast len to all bytes
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pcmpgtb xtmph3, xtmpl4
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XLDR xtmpl4, [dest4+tmp] ;Get next dest vector
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movdqa xtmpa, x0 ;Keep unshifted copy of src
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psraw x0, 4 ;Shift to put high nibble into bits 4-0
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pand x0, xmask0f ;Mask high src nibble in bits 4-0
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pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
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; dest1
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pshufb xtmph1, x0 ;Lookup mul table of high nibble
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pshufb xtmpl1, xtmpa ;Lookup mul table of low nibble
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pxor xtmph1, xtmpl1 ;GF add high and low partials
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pand xtmph1, xtmph3
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pxor xd1, xtmph1
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; dest2
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pshufb xtmph2, x0 ;Lookup mul table of high nibble
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pshufb xtmpl2, xtmpa ;Lookup mul table of low nibble
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pxor xtmph2, xtmpl2 ;GF add high and low partials
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pand xtmph2, xtmph3
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pxor xd2, xtmph2
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; dest3
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pshufb xgft3_hi, x0 ;Lookup mul table of high nibble
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pshufb xtmpl3, xtmpa ;Lookup mul table of low nibble
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pxor xgft3_hi, xtmpl3 ;GF add high and low partials
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pand xgft3_hi, xtmph3
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pxor xtmph4, xgft3_hi
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; dest4
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pshufb xgft4_hi, x0 ;Lookup mul table of high nibble
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pshufb xgft4_lo, xtmpa ;Lookup mul table of low nibble
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pxor xgft4_hi, xgft4_lo ;GF add high and low partials
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pand xgft4_hi, xtmph3
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pxor xtmpl4, xgft4_hi
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XSTR [dest1+tmp], xd1 ;Store result
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XSTR [dest2+tmp], xd2 ;Store result
|
||
|
|
XSTR [dest3+tmp], xtmph4 ;Store result
|
||
|
|
XSTR [dest4+tmp], xtmpl4 ;Store result
|
||
|
|
|
||
|
|
.return_pass:
|
||
|
|
FUNC_RESTORE
|
||
|
|
mov return, 0
|
||
|
|
ret
|
||
|
|
|
||
|
|
.return_fail:
|
||
|
|
FUNC_RESTORE
|
||
|
|
mov return, 1
|
||
|
|
ret
|
||
|
|
|
||
|
|
endproc_frame
|
||
|
|
|
||
|
|
section .data
|
||
|
|
|
||
|
|
align 16
|
||
|
|
|
||
|
|
mask0f:
|
||
|
|
ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
|
||
|
|
constip16:
|
||
|
|
ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
|
||
|
|
|
||
|
|
%macro slversion 4
|
||
|
|
global %1_slver_%2%3%4
|
||
|
|
global %1_slver
|
||
|
|
%1_slver:
|
||
|
|
%1_slver_%2%3%4:
|
||
|
|
dw 0x%4
|
||
|
|
db 0x%3, 0x%2
|
||
|
|
%endmacro
|
||
|
|
;;; func core, ver, snum
|
||
|
|
slversion GF_4VECT_MAD_SSE, 00, 00, 0209
|